DocumentCode
2709882
Title
High Power Density, High Efficiency System Two-stage Power Architecture for Laptop Computers
Author
Julu Sun ; Ming Xu ; Yucheng Ying ; Lee, Fred C.
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA
fYear
2006
fDate
18-22 June 2006
Firstpage
1
Lastpage
7
Abstract
This paper proposes a two-stage power architecture for laptop voltage regulators (VRs). By taking advantage of the thermal design power (TDP) requirement in the laptop, VRs for microprocessor, graphics, DDR memory and main power can share the same first stage with very low design power. The high-efficiency and high-frequency first stage based on switching capacitor technology and second stage design is presented in this paper respectively. Two different designs are illustrated and verified by experiments. One design keeps the similar VR cost as the current single-stage solution and improves VR light load efficiency by 5%. Another design has slightly higher VR efficiency comparing with single-stage solution while reducing the footprint of VR output inductors and capacitors by 25%~33% and VR total cost by 5%
Keywords
laptop computers; network synthesis; switching convertors; voltage regulators; high efficiency system two-stage power architecture; laptop computers; laptop voltage regulators; switching capacitor technology; thermal design power; Capacitors; Computer architecture; Computer graphics; Costs; Inductors; Microprocessors; Portable computers; Regulators; Virtual reality; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE
Conference_Location
Jeju
ISSN
0275-9306
Print_ISBN
0-7803-9716-9
Type
conf
DOI
10.1109/PESC.2006.1711768
Filename
1711768
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