Title :
Reliability investigation of T-RAM cells for DRAM applications
Author :
Mulaosmanovic, H. ; Paolucci, Giovanni M. ; Compagnoni, C. Monzio ; Castellani, N. ; Carnevale, G. ; Fantini, P. ; Ventrice, D. ; ViganoÌ, Sara ; Conti, Anna M. ; Righetti, Niccolo ; Spinelli, Alessandro S. ; Lacaita, Andrea L. ; Benvenuti, A. ; Grossi,
Author_Institution :
Dipt. di Elettron., Inf. e Bioingegneria, Politec. di Milano, Milan, Italy
Abstract :
In this work, we present a reliability investigation of T-RAM cells, considering their read failure, data retention and endurance. Experimental results on decananometer devices reveal a successful cell operation solving the voltage trade-off for optimal performance on state-0 and state-1, whose origin is explained by clear pictures of the physical processes giving rise to read failure and limiting data retention. Moreover, endurance results appear very promising, with cell functionality preserved up to very high cycling doses.
Keywords :
DRAM chips; integrated circuit reliability; DRAM applications; T-RAM cells; cell functionality; data endurance; data retention; decananometer devices; optimal performance; physical processes; read failure; reliability investigation; state-0; state-1; voltage trade-off; Anodes; Logic gates; Performance evaluation; Random access memory; Reliability; Resistance; Temperature measurement; T-RAM; forward-breakover; gated-thyristors; nanoscale semiconductor devices; semiconductor-device modeling;
Conference_Titel :
Reliability Physics Symposium, 2014 IEEE International
Conference_Location :
Waikoloa, HI
DOI :
10.1109/IRPS.2014.6861162
