Title :
64/256 QAM chip-set for digital CATV application
Author :
Ishizawa, Yoshiro ; Yanai, Yoshimasa ; Nakayama, Isao
Author_Institution :
ULSI Syst. Dev. Labs., NEC Corp., Kawasaki, Japan
Abstract :
A small and cost effective 16/32/64/256 QAM receiver chip-set is developed for next generation digital CATV systems. The QAM receiver was partitioned into a two-chip set, analog and digital chip for board size reduction. Most of all the analog parts except the tuner is incorporated in one chip. The digital adaptive equalizer with about 470 k-transistors has been implemented on a 35 mm2 die using a 0.5 μm CMOS technology and with an optimized filter circuit
Keywords :
CMOS analogue integrated circuits; CMOS digital integrated circuits; adaptive equalisers; analogue processing circuits; cable television; circuit optimisation; digital signal processing chips; digital television; large scale integration; quadrature amplitude modulation; television receivers; 0.5 micron; 16 QAM; 256 QAM receiver chip-set; 32 QAM; 64 QAM; CMOS technology; LSI; analog chip; board size reduction; digital CATV application; digital CATV systems; digital adaptive equalizer; digital chip; optimized filter circuit; transistors; tuner; Adaptive equalizers; Adaptive filters; Circuits; Clocks; Demodulation; Digital filters; Large scale integration; Phase locked loops; Quadrature amplitude modulation; Signal generators;
Conference_Titel :
Consumer Electronics, 1995., Proceedings of International Conference on
Conference_Location :
Rosemont, IL
Print_ISBN :
0-7803-2140-5
DOI :
10.1109/ICCE.1995.517882
