Title :
4.2W CMOS Frequency Synthesizer for 2.4GHz ZigBee Application with Fast Settling Time Performance
Author :
Shin, Sangho ; Lee, Kwyro ; Kang, Sung-Mo
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., KAIST, Daejeon
Abstract :
A new frequency synthesizer with low-power and short settling time is introduced. With two-point channel controls for an integer-N PLL, we have achieved a near zero settling time for any frequency change in 2.4GHz ZigBee band. By utilizing a vertical-NPN parasitic transistor for the VCO biasing, the close-in phase noise has been improved by 5dB from the case of MOS biasing. A modified-TSPC topology is proposed for low-voltage frequency divider circuits. Using the 1.2V supply voltage for 0.18mum CMOS, the power consumption is only 4.2mW and the phase noise is -116.5dBc/Hz at 1MHz offset
Keywords :
CMOS integrated circuits; UHF integrated circuits; frequency dividers; frequency synthesizers; low-power electronics; network topology; personal area networks; phase locked loops; phase noise; voltage-controlled oscillators; 0.18 micron; 1.2 V; 2.4 GHz; 4.2 mW; CMOS frequency synthesizer; MOS biasing; VCO biasing; ZigBee application; frequency divider circuits; near zero settling time; phase locked loop; phase noise; two-point channel controls; vertical-NPN parasitic transistor; voltage controlled oscillators; Circuit topology; Energy consumption; Frequency conversion; Frequency synthesizers; MOSFETs; Phase locked loops; Phase noise; Voltage; Voltage-controlled oscillators; ZigBee; Frequency synthesizer; VNPN; low-noise; low-power; settling time; two-point control;
Conference_Titel :
Microwave Symposium Digest, 2006. IEEE MTT-S International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-9541-7
Electronic_ISBN :
0149-645X
DOI :
10.1109/MWSYM.2006.249558
