DocumentCode
2710699
Title
A three-stage ATM switch architecture for high utilization of switch capacity under hot-spot traffic
Author
Ma, Jian
Author_Institution
Nokia Res. Center, Helsinki, Finland
fYear
1997
fDate
25-28 May 1997
Firstpage
534
Lastpage
543
Abstract
Various types of ATM switch fabrics have been proposed and developed. Among them, the output buffered switch known as the Knockout switch has been extensively studied because of its good delay/throughput performance. However, in a hot-spot traffic condition, it is shown in some studies that even if only a small percentage of all requests is destined for a hot-spot, these requests can significantly degrade the system performance. Therefore, to guarantee the switch performance even under the hot-spot traffic the switch has to provide a sufficiently large capacity and buffer size. Thus it will increase significantly the switch cost and complexity. We focus on how to utilize the switch capacity under hot-spot traffic. We propose a three-stage ATM switch architecture with a distributed dynamic routing scheme which uses feedback flow control and a cascade of a sort-network and a shift-network. Our simulation results show that the proposed switch can significantly improve the cell loss performance in hot-spot traffic without increasing the switch capacity in comparison with the random routing schemes in three-stage Clos´ (1953) switches, i.e., the proposed switch has a better switch capacity utilization than other switches
Keywords
asynchronous transfer mode; feedback; multistage interconnection networks; telecommunication congestion control; telecommunication network routing; telecommunication traffic; ATM switch fabrics; Knockout switch; buffer size; cell loss performance; delay/throughput performance; distributed dynamic routing; feedback flow control; hot-spot traffic; output buffered switch; random routing; shift-network; simulation results; sort-network; switch capacity; system performance; three-stage ATM switch architecture; three-stage Clos switches; Asynchronous transfer mode; Costs; Degradation; Delay; Fabrics; Routing; Switches; System performance; Throughput; Traffic control;
fLanguage
English
Publisher
ieee
Conference_Titel
IEEE ATM Workshop 1997. Proceedings
Conference_Location
Lisboa
Print_ISBN
0-7803-4196-1
Type
conf
DOI
10.1109/ATM.1997.624724
Filename
624724
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