Title :
LLRU: Late LRU Replacement Strategy for Power Efficient Embedded Cache
Author :
Raveendran, Biju K. ; Sudarshan, T.S.B. ; Kumar, P. Dilip ; Tangudu, Priyanka ; Gurunarayanan, S.
Author_Institution :
BITS, Pilani
Abstract :
This paper proposes a new cache replacement scheme, late least recently used (LLRU). LLRU takes care of shared pages improves its accessibility and offers improved cache performance. LLRU modifies the existing least recently used (LRU) algorithm. This scheme, improves cache performance for applications, which has shared pages. We also propose square matrix and counter based hardware design for LLRU. We show that the proposed scheme will achieve considerable improvement in hit rate. The experimental results are obtained using Simplescalar2.0 cache simulator benchmark. The hardware performance of LLRU counter and square matrix implementation is measured by using Modelsim and Leonardo spectrum.
Keywords :
cache storage; integrated circuit design; low-power electronics; Leonardo spectrum; Modelsim; Simplescalar2.0 cache simulator benchmark; counter based hardware design; late least recently used cache replacement scheme; power efficient embedded cache; shared pages; square matrix; Cache memory; Circuit simulation; Complexity theory; Counting circuits; Dynamic scheduling; Embedded computing; Energy consumption; Hardware; Power measurement; Round robin;
Conference_Titel :
Advanced Computing and Communications, 2007. ADCOM 2007. International Conference on
Conference_Location :
Guwahati, Assam
Print_ISBN :
0-7695-3059-1
DOI :
10.1109/ADCOM.2007.86