Combined trap generation and transient trap occupancy model for time evolution of NBTI during DC multi-cycle and AC stress

A transient trap occupancy model is proposed to determine the charged state of generated N_IT in real time during successive stress (pulse ON) and recovery (pulse OFF) cycles for DC and AC NBTI stress. The model converts ΔN_IT (trap density) to compute the ΔV_IT (voltage shift) subcomponent of overall ΔV_T; time evolution of ΔN_IT is obtained using numerical RD simulation for multi-cycle DC and low f AC, and a calibrated compact model for high f AC stress to reduce simulation time. A cyclostationary stretched exponential model is used for the ΔV_HT subcomponent of ΔV_T. The complete model is used to predict time evolution of ΔV_T (=ΔV_IT + ΔV_HT), measured using Ultra-Fast MSM method in HKMG p-MOSFETs for multiple and completely arbitrary DC stress and recovery cycles and for AC stress at different duty, f and pulse low bias. Finally a compact model is proposed, which is capable of providing AC/DC ratio at fixed time and compared to the transient model for different gate activity.