Title :
A Novel Distributed Interleaving Scheme to achieve Scalable Phase Design For Microprocessor Power Management
Author :
Xin Zhang ; Huang, Z.
Author_Institution :
Analog Devices Inc., San Jose, CA
Abstract :
This paper introduces a novel distributed interleaving scheme for the multi-phase DC-DC converter used for microprocessor power management. The proposed scheme can easily achieve scalable phase interleaving without channel number limitation. Each channel´s interleaving circuitry can be monolithically integrated without any external component. This scheme is verified by a 1 MHz discrete hardware. A silicon test chip that integrates the proposed distributed interleaving cell was also developed. The testing result further verified the features of the proposed scheme and circuit. The new interleaving solution can also be used in any other cellular converter system
Keywords :
DC-DC power convertors; microprocessor chips; monolithic integrated circuits; 1 MHz; cellular converter system; channel number limitation; discrete hardware; distributed interleaving scheme; microprocessor power management; monolithically integrated circuit; multiphase DC-DC converter; scalable phase design; silicon test chip; Central Processing Unit; Circuit testing; Clocks; Energy management; Frequency synchronization; Interleaved codes; Microprocessors; Power supplies; Virtual reality; Voltage; Distributed interleaving; MVRC; Scalable phase design; VRM;
Conference_Titel :
Power Electronics Specialists Conference, 2006. PESC '06. 37th IEEE
Conference_Location :
Jeju
Print_ISBN :
0-7803-9716-9
DOI :
10.1109/PESC.2006.1711950
