Applying an FPGA-counter-based control strategy to multiple SR outputs of a forward converter

In this paper, an FPGA-counter-based scheme is presented herein and applied to a forward converter with single isolation stage and multiple outputs having synchronous rectification (SR). With only the required comparators and without any analog-to-digital converter (ADC), the information on the feedback output voltage is entirely obtained according to a counter. Therefore, the proposed control strategy for an SR forward converter can improve the transient load response and the cross regulation. In this paper the proposed control scheme is described and some experimental results are provided to verify its effectiveness