Title :
Low power limiter [FET amplifiers]
Author :
Krutov, A.V. ; Mitlin, V.A. ; Rebrov, A.S.
Author_Institution :
Istok, FSUC SRC
Abstract :
The present article introduces the results of designing a low power limiter for GaAs FET amplifiers. The possibility of obtaining minimal values for the noise factor is shown when matching circuits are optimized with regard to the limiter diode parasitic capacitance and when the amplifying transistor gate-source junction is used as a detector diode.
Keywords :
III-V semiconductors; circuit noise; circuit optimisation; field effect transistor circuits; gallium arsenide; microwave amplifiers; microwave limiters; GaAs; GaAs FET amplifier low power limiters; amplifying transistor gate-source junction detector diode; circuit matching; circuit optimization; limiter diode parasitic capacitance; microwave amplifiers; noise factor minimization; Gain; Gallium arsenide; HEMTs; Helium; IEEE catalog; Inductance; Microwave FETs; Microwave technology; Noise figure; Organizing;
Conference_Titel :
Microwave and Telecommunication Technology, 2002. CriMiCo 2002. 12th International Conference
Print_ISBN :
966-7968-12-X
DOI :
10.1109/CRMICO.2002.1137181
