• DocumentCode
    2713271
  • Title

    A Few Design Techniques for the "Dependability" of a SOC

  • Author

    Qian, Jun

  • Author_Institution
    Adv. Micro Device, Shanghai, China
  • fYear
    2012
  • fDate
    19-22 Nov. 2012
  • Firstpage
    70
  • Lastpage
    70
  • Abstract
    There are many attributes related to dependability: availability and reliability, confidentiality, integrity and maintainability. To design a "dependable" SOC could mean one or all of the following: fault tolerant design, redundancy design, "design for security" or simply to improve silicon validation in order to produce a more robust chip. In this paper, the author is going to examine three design techniques fall into the domain of design for dependability: silicon fault injection; harvestable design and design for security. There are many ways the system can be under "attack" and become faulty. Designing the system to be fault tolerant will increase the availability and reliability. One important element of a fault tolerant design is software ECO system for fault detection and correction. However, testing and validation of the fault detection and correction features require the creation of a faulty condition. In this paper, we will look at some IC design based fault injection techniques and their applications in software testing. Another technique to improve system availability and possibly improve system reliability is to add redundancy. Designs with redundant blocks are often called harvestable. Fault detection and isolation will be needed to separate between harvestable and faulty blocks. The detection and isolation processes are available during silicon detection or run time which will make increase system reliability. Harvestable designs are often a valid mean to improve device yield.User confidentiality and system integrity demand a "secured" IC design. Security features limit access to system data stored in IC in different security states. We will discuss the design for test challenges in the face of all the security features along with design\´s security mechanism.
  • Keywords
    circuit reliability; electronic engineering computing; elemental semiconductors; fault diagnosis; fault tolerant computing; logic design; logic testing; silicon; system-on-chip; IC design; SOC; fault correction; fault detection; fault isolation; fault tolerant design; harvestable design; redundancy design; silicon detection; silicon fault injection; silicon validation; software ECO system; software testing; system integrity; system reliability; user confidentiality; Availability; Fault tolerance; Fault tolerant systems; Integrated circuits; Security; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium (ATS), 2012 IEEE 21st Asian
  • Conference_Location
    Niigata
  • ISSN
    1081-7735
  • Print_ISBN
    978-1-4673-4555-2
  • Electronic_ISBN
    1081-7735
  • Type

    conf

  • DOI
    10.1109/ATS.2012.77
  • Filename
    6394177