Title :
VLSI design of a bit-serial word-parallel sorter
Author :
Shim, Kui Sin ; Razavi, Hassan M.
Author_Institution :
North Carolina Univ., Charlotte, NC, USA
Abstract :
The design implementation of a sequential circuit which compares and sorts eight words simultaneously is presented. Each word is an unsigned integer of K bits, where K can be any positive integer. The words are fed into the sorter starting with the most significant bit of each word. On each clock pulse one bit from each word is received by the sorter and they are routed to their proper destination. The sorter is implemented using complementary metal-oxide-silicon (CMOS) technology.<>
Keywords :
CMOS integrated circuits; VLSI; parallel machines; sequential circuits; sorting; CMOS technology; VLSI design; bit-serial word-parallel sorter; complementary metal-oxide-silicon; sequential circuit; unsigned integer; CMOS technology; Clocks; Integrated circuit interconnections; Multiplexing; Multiprocessing systems; Parallel processing; Sequential circuits; Silicon compounds; Sorting; Very large scale integration;
Conference_Titel :
System Theory, 1988., Proceedings of the Twentieth Southeastern Symposium on
Conference_Location :
Charlotte, NC, USA
Print_ISBN :
0-8186-0847-1
DOI :
10.1109/SSST.1988.17120
