DocumentCode
2714139
Title
Automatic Test Program Generation for Out-of-Order Superscalar Processors
Author
Zhang, Ying ; Rezine, Ahmed ; Eles, Petru ; Peng, Zebo
Author_Institution
Embedded Syst. Lab., Linkoping Univ., Linkoping, Sweden
fYear
2012
fDate
19-22 Nov. 2012
Firstpage
338
Lastpage
343
Abstract
This paper presents a high-level automatic test instruction generation (HATIG) technical that allows, for the first time, to test the scheduling unit of an out-of-order super scalar processor. This technique leverages on existing bounded model checking tools in order to generate software-based self-testing programs from a global EFSM model of the processor under test. The experimental results have demonstrated the efficiency of the proposed technique.
Keywords
automatic programming; automatic test pattern generation; formal verification; microprocessor chips; program testing; automatic test program generation; bounded model checking tool; global EFSM model; high level automatic test instruction generation; software based self testing programs; superscalar processor; Automatic test pattern generation; Circuit faults; Out of order; Processor scheduling; Registers; Automatic Test Instruction Generation; Bounded Model Chekcing; Out-of-Order Superscalar Processor; Software-Based Self-Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ATS), 2012 IEEE 21st Asian
Conference_Location
Niigata
ISSN
1081-7735
Print_ISBN
978-1-4673-4555-2
Electronic_ISBN
1081-7735
Type
conf
DOI
10.1109/ATS.2012.43
Filename
6394226
Link To Document