Title :
Variation-Aware Fault Grading
Author :
Czutro, A. ; Imhof, M.E. ; Jiang, J. ; Mumtaz, A. ; Sauer, M. ; Becker, B. ; Polian, I. ; Wunderlich, H.-J.
Abstract :
An iterative flow to generate test sets providing high fault coverage under extreme parameter variations is presented. The generation is guided by the novel metric of circuit coverage, calculated by massively parallel statistical fault simulation on GPGPUs. Experiments show that the statistical fault coverage of the generated test sets exceeds by far that achieved by standard approaches.
Keywords :
fault location; fault simulation; GPGPU; circuit coverage; extreme parameter variation; iterative flow; massively parallel statistical fault simulation; statistical fault coverage; test set; variation-aware fault grading; Automatic test pattern generation; Circuit faults; Delay; Integrated circuit modeling; Logic gates; Robustness; ATPG; GPGPU; Monte-Carlo; SAT-based; fault grading; fault simulation; process variations;
Conference_Titel :
Test Symposium (ATS), 2012 IEEE 21st Asian
Conference_Location :
Niigata
Print_ISBN :
978-1-4673-4555-2
Electronic_ISBN :
1081-7735
DOI :
10.1109/ATS.2012.14
