• DocumentCode
    271509
  • Title

    Accelerating Fully Homomorphic Encryption in Hardware

  • Author

    Doroz, Yarkın ; Ozturk, Erdinc ; Sunar, Berk

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Worcester Polytech. Inst., Worcester, MA, USA
  • Volume
    64
  • Issue
    6
  • fYear
    2015
  • fDate
    June 1 2015
  • Firstpage
    1509
  • Lastpage
    1521
  • Abstract
    We present a custom architecture for realizing the Gentry-Halevi fully homomorphic encryption (FHE) scheme. This contribution presents the first full realization of FHE in hardware. The architecture features an optimized multi-million bit multiplier based on the Schonhage Strassen multiplication algorithm. Moreover, a number of optimizations including spectral techniques as well as a precomputation strategy is used to significantly improve the performance of the overall design. When synthesized using 90 nm technology, the presented architecture achieves to realize the encryption, decryption, and recryption operations in 18.1 msec, 16.1 msec, and 3.1 sec, respectively, and occupies a footprint of less than 30 million gates.
  • Keywords
    application specific integrated circuits; cryptography; matrix multiplication; FHE; Gentry-Halevi fully homomorphic encryption scheme; Sch€onhage Strassen multiplication algorithm; application specific hardware; custom architecture; decryption; multimillion bit multiplier optimization; precomputation strategy; recryption operation; size 90 nm; spectral technique; time 16.1 ms; time 18.1 ms; time 3.1 s; Computer architecture; Encryption; Hardware; Indexes; Polynomials; Random access memory; Fully homomorphic encryption; application specific hardware; cryptographic accelerators; large-integer multiplication;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2014.2345388
  • Filename
    6871300