Title :
A novel low-voltage low-power SAR ADC for biomedical applications
Author :
Yuan, Chao ; Lam, Yvonne Y H
Author_Institution :
IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
Abstract :
This paper presents a novel charge-redistribution successive-approximation register (SAR) analog-to-digital converter (ADC). The proposed ADC is based on a novel capacitive DAC switching scheme which employs unit capacitors for voltage sampling and charge redistribution. Compared with published capacitive DAC which uses the same unit size capacitor, the proposed DAC needs only 33% of the total switches. The proposed 8-bit SAR-ADC is designed in Global foundries 65nm CMOS process. SPICE simulation results show that the average switching energy can be reduced by more than 60% compared with published design. The simulated power consumption of the capacitive DAC is about 110 nW at 1.0 V power supply and 100KS/s. The simulated average power consumption of the ADC is about 2.8 μW.
Keywords :
CMOS digital integrated circuits; SPICE; analogue-digital conversion; biomedical electronics; low-power electronics; CMOS process; SAR-ADC; SPICE simulation; analog-digital converter; average switching energy; biomedical applications; capacitive DAC; charge-redistribution successive-approximation register; low-voltage low-power SAR ADC; size 65 nm; voltage 1 V; voltage sampling; word length 8 bit; Arrays; Capacitance; Capacitors; Clocks; Noise; Power demand; Switches;
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location :
Bordeaux
Print_ISBN :
978-1-61284-135-9
DOI :
10.1109/NEWCAS.2011.5981229