DocumentCode :
2715397
Title :
Pre-Metal Dielectric Impact on Field Transistor Vt Shift in an 80V Technology
Author :
Williams, Brett ; Haskett, Thomas ; Sorenson, Brent ; Giraud, John ; Corsetti, Todd
fYear :
2007
fDate :
20-20 April 2007
Firstpage :
35
Lastpage :
36
Abstract :
The I3T80 technology being developed at AMI Semiconductor, Inc. uses lateral extended-drain MOS transistors (DMOS) [1] in a 0.35¿m base technology. The base technology was developed using 3.3V signals on the gate, and the metal field transistor test results did not show a significant threshold voltage (vt) shift. This paper discusses the impact on the parasitic NMOS metal field transistor threshold voltage when a high voltage is applied to the gate over an extended time at an elevated temperature. This Vt shift is shown to vary widely with various pre-metal dielectric stacks.
Keywords :
Ambient intelligence; CMOS technology; Circuits; Dielectrics; MOS devices; MOSFETs; Plasma temperature; Semiconductor films; Testing; Threshold voltage; High Voltage; PMD; Parasitic Field Transistor; Pre-Metal Dielectric;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electron Devices, 2007. WMED 2007. IEEE Workshop on
Conference_Location :
Boise, ID, USA
Print_ISBN :
1-4244-1114-9
Electronic_ISBN :
1-4244-1114-9
Type :
conf
DOI :
10.1109/WMED.2007.368053
Filename :
4218996
Link To Document :
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