• DocumentCode
    2715505
  • Title

    Adaptive dual loop phase lock loop with improved performance

  • Author

    Al-Araji, Saleh R. ; Mezher, Kahtan A.

  • Author_Institution
    Khalifa Univ., Sharjah, United Arab Emirates
  • fYear
    2011
  • fDate
    26-29 June 2011
  • Firstpage
    341
  • Lastpage
    344
  • Abstract
    An adaptive dual loop phase locked loop (PLL) system with auto selection technique for fast acquisition, reliable locking and improved noise performance is proposed. The system utilizes the wide locking range properties and fast acquisition of the first order loop and enhanced noise performance of the second order loop. The simulation results confirmed the new system´s ability to switch between 2nd and 1st order loops in order to acquire fast acquisition, while keeping the loop in lock. In this work, the system is designed to overcome the conflicting requirement of fast acquisition and improved noise performance. This technique is particularly desirable for communication and control applications.
  • Keywords
    circuit noise; phase locked loops; PLL; adaptive dual loop phase lock loop; autoselection technique; locking reliability; noise performance; second order loop; wide locking range properties; Bandwidth; Low pass filters; Noise; Phase locked loops; Reliability; Switches; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
  • Conference_Location
    Bordeaux
  • Print_ISBN
    978-1-61284-135-9
  • Type

    conf

  • DOI
    10.1109/NEWCAS.2011.5981240
  • Filename
    5981240