DocumentCode :
2715606
Title :
Poster Presentation 6: Logic Circuits Operating in Both Sub- and Above-Threshold Voltages
Author :
Nyathi, Jabulani ; Bero, Brent
Author_Institution :
Washington State University, School of Electrical Engineering & Computer Science, 102 Spokane Ave Pullman, WA 99164
fYear :
2007
fDate :
20-20 April 2007
Firstpage :
62
Lastpage :
62
Abstract :
Interest in VLSI subthreshold design has recently increased due to the emergence of systems that require ultra-low power operation. Furthermore the ever increasing leakage currents, now used to drive logic make subthreshold design an interesting prospect. Subthreshold sacrifices speed for power creating a clear divide between designing for high speed and ultra-low power. It might be beneficial to allow circuits designed for subthreshold operation to become operable at above threshold voltages (super-threshold), depending on processing needs. In this study among other things; the feasibility of optimizing device sizes for both subthreshold and above threshold operations is considered. Three widely publicized body biasing techniques are examined and compared to a newly proposed tunable body biasing scheme. The comparison is in terms of power and energy dissipation as well as speed. A number of logic styles are simulated to draw conclusions on what logic style in conjunction with what body biasing scheme offer improved performance.
Keywords :
Circuit simulation; Computer science; Leakage current; Linear feedback shift registers; Logic circuits; Logic design; Logic devices; Threshold voltage; Tunable circuits and devices; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electron Devices, 2007. WMED 2007. IEEE Workshop on
Conference_Location :
Boise, ID, USA
Print_ISBN :
1-4244-1114-9
Electronic_ISBN :
1-4244-1114-9
Type :
conf
DOI :
10.1109/WMED.2007.368067
Filename :
4219010
Link To Document :
بازگشت