DocumentCode
2715907
Title
A dual-power rail, low-dropout, fast-response linear regulator dedicated to a wafer-scale electronic systems prototyping platform
Author
Laflamme-Mayer, Nicolas ; Sawan, Mohamad ; Blaquière, Yves
Author_Institution
Ecole Polytech. Montreal, Montréal, QC, Canada
fYear
2011
fDate
26-29 June 2011
Firstpage
438
Lastpage
441
Abstract
A new dual-power rail low-dropout linear voltage regulator is presented in this paper for a 180 nm CMOS technology applied to a wafer-scale platform for electronic system prototyping. Fast load regulation is achieved with a 2.5 to 10 ns time response for voltages that range from 1.0 to 2.5 V using a dual power supply of 1.8 and 3.3 V. The overall deviation of the output sweeps from 10 to 40 mV, which is two times smaller, compared to other published topologies and the maximum load current is 20 mA. Power supply rejection ratio for the whole range of the regulator is below -30 dB for frequencies up to 1 GHz.
Keywords
CMOS analogue integrated circuits; power supplies to apparatus; CMOS technology; dual-power rail linear regulator; electronic system prototyping; fast-response linear regulator; low-dropout linear regulator; power supply rejection ratio; size 180 nm; voltage 2.5 V to 1 V; voltage 3.3 V; wafer-scale electronic systems; Logic gates; Power supplies; Rails; Regulators; Silicon; Topology; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location
Bordeaux
Print_ISBN
978-1-61284-135-9
Type
conf
DOI
10.1109/NEWCAS.2011.5981264
Filename
5981264
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