A 90nm, low power VCO with reduced KVCO and sub-band spacing variation

In this paper we present the design of a low power VCO with reduced variations in VCO gain (K_VCO) and sub-band spacing resolution (f_res). The proposed VCO is designed using a 90 nm CMOS process to cover a tuning range of 23%. Variations in K_VCO and f_res are reduced by factors of 6 and 17 respectively over a conventional sub-banded VCO, designed using the same process, to meet the same tuning range. This makes the proposed VCO more suited to stable PLL operation with its reduced K_VCO requirements resulting in an improvement in phase noise performance over the conventional VCO by 2 dB. Due to the reduced loading on the VCO tank achieved by the presented design, power consumption is kept extremely low at 850 μW from a 1 V supply.