A modular synthesis method for low-power QDI state machines

In this paper, a direct mapping synthesis method for asynchronous sequential controllers from a state graph model is presented. This Method targets Quasi Delay Insensitive (QDI) controllers and shows a drastic enhancement in circuit performances compared to the standard HDL-based synthesis. Firstly, the modeling issues are discussed. Secondly, the direct mapping algorithms are presented. The sequence of events in such controllers makes possible local optimization techniques at gates level, especially for reducing power. The synthesized circuit performance enhancements compared to HDL-based synthesis is shown through electric simulations. One example is synthesized and simulated in a 130 nm CMOS technology from ST Microelectronics. The results show an important power consumption reduction and shorter circuit latencies.