Title :
A delta-sigma modulator with a phase-to-digital and digital-to-phase quantizer
Author :
Lin, Yiqiao ; Ismail, Mohammed
Author_Institution :
Dept. of Electr. & Comput. Eng., Ohio State Univ., Columbus, OH, USA
Abstract :
A phase-based delta-sigma analog-to-digital converter (ADC) architecture with a combination voltage-controlled and digitally-controlled delay lines (VCDL-DCDL) is presented. The architecture uses this VCDL-DCDL combination as the phase-domain counterparts of an ADC-DAC in a traditional delta-sigma modulator. Simulation results of the new modulator achieve a 60.1 dB SNR, or a 9.7 bit over a 10 MHz bandwidth.
Keywords :
delays; delta-sigma modulation; ADC-DAC; delta-sigma analog-to-digital converter; delta-sigma modulator; digital-phase quantizer; digitally-controlled delay lines; phase-digital quantizer; phase-domain counterparts; voltage-controlled delay lines; Clocks; Decoding; Delay; Delay lines; Detectors; Phase modulation; Registers;
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location :
Bordeaux
Print_ISBN :
978-1-61284-135-9
DOI :
10.1109/NEWCAS.2011.5981292
