Adapting the Doherty amplifier for millimetre-wave CMOS applications

This paper investigates the difficulties of implementing a Doherty power amplifier (DPA) in CMOS at millimetre-wave (mm-wave) frequencies. A simplified circuit-level model of the Doherty is proposed to study the performance limitations of deep sub-micron technologies, namely the output impedance, knee voltage, and breakdown voltage. Subsequently, the trends found with the model are used to implement a reconfigurable DPA at E-band frequencies in a commercially available 90-nm RF-CMOS process. The DPA consumes 21.7 mA from 1.5 V and produces 11.7 dBm of output power at P_1dB with a P AE of 30.6 % and a 6-dB back-off PAE of 15.6 %. The reconfigurable option is bias controlled and improves the gain by 3.2 dB while increasing the current consumption by 7.1 mA. The circuit footprint is 1.53 mm² and the efficiency characteristics are within 5 % of the model prediction.