Title :
A multipurpose single chip JBIG based compression/decompression system
Author :
Higashi, Akihiro ; Ohwada, Hideo ; Tamaki, Kazuhide ; Tahara, Noriaki ; Goto, Gensuke
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
Abstract :
The Joint Bilevel Image Experts Group (JBIG) coding system was adopted as an international standard for next-generation image coding systems. An LSI which compresses/decompresses images 1-pixel/clock through pipeline architecture and conforms to JBIG and conventional modified Huffman/modified read/modified modified read (MH/MR/MMR) coding functions and has flexible bus configuration facilities to allow multipurpose use is described
Keywords :
data compression; digital signal processing chips; image coding; integrated logic circuits; large scale integration; pipeline processing; Joint Bilevel Image Experts Group; LSI; bus configuration; compression/decompression system; image compression; image decompression; modified Huffman coding; modified modified read coding; modified read coding; multipurpose single chip JBIG coding system; pipeline architecture; Circuits; Decoding; Delay; Facsimile; Humans; Image coding; Large scale integration; Pipelines; Pixel; Size control;
Conference_Titel :
Consumer Electronics, 1995., Proceedings of International Conference on
Conference_Location :
Rosemont, IL
Print_ISBN :
0-7803-2140-5
DOI :
10.1109/ICCE.1995.517988
