DocumentCode :
2716868
Title :
Automatic HLS based low-cost IP watermarking
Author :
Le Gal, Bertrand ; Bossuet, Lilian
Author_Institution :
IMS Lab., Univ. of Bordeaux, Bordeaux, France
fYear :
2011
fDate :
26-29 June 2011
Firstpage :
490
Lastpage :
493
Abstract :
Currently, the Intellectual Properties (IP) and their reuse are common, however the use of IP is raising design security issues i.e. counterfeiter, reverse engineering. Watermarking is one of the efficient methods to detect an unauthorized IP use and a counterfeiter. In this context, many interesting works have been proposed. However, a few of them combine the watermarking process with the synthesis one. This article presents a new automatic and low cost watermarking solution. The design watermark is implanted in a high-level synthesis process. Some implementation results with Xilinx Virtex-5 FPGA assure the proposed solution low overhead compared to existing solution.
Keywords :
field programmable gate arrays; watermarking; IP watermarking; Xilinx Virtex-5 FPGA; automatic HLS; counterfeiter; intellectual properties; reverse engineering; watermarking process; Algorithm design and analysis; Computer architecture; Field programmable gate arrays; IP networks; Intellectual property; Multiplexing; Watermarking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International
Conference_Location :
Bordeaux
Print_ISBN :
978-1-61284-135-9
Type :
conf
DOI :
10.1109/NEWCAS.2011.5981326
Filename :
5981326
Link To Document :
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