A Fully Integrated 26.5 dBm CMOS Power Amplifier for IEEE 802.11a WLAN Standard with on-chip "power inductors"

A fully integrated power amplifier (PA) for 5 GHz 802.11a standard is implemented using a 0.18 mum CMOS process. In this paper we present the new concept of "power inductors". These on-chip inductors are implemented on the transistor drains and the output network and they can withstand the high level current signals that go through them while presenting low DC-resistance and high Q characteristics. The two stage differential power amplifier is fully integrated including the input and output networks. Measurement results show that the power amplifier achieves a power gain of 25.5 dB, 1 dB compression point (P_1dB) of 20.8 dBm and power added efficiency of 26.7 %. The saturated output power is 26.5 dBm, achieving the highest reported output power among CMOS PAs for 5-GHz WLAN applications