Title :
An integrated CMOS instrumentation amplifier with improved CMRR
Author :
Dal Fabbro, P.A. ; Filho, A. Dos Reis
Author_Institution :
Electr. Eng. Sch., State Univ. of Campinas, Brazil
Abstract :
An instrumentation amplifier is described, which is based on the classical current-balancing technique that ensures this type of circuit achieves high immunity to common-mode signals. In the particular case of the circuit herein described, a CMRR of 110 dB was attained, thanks specially to improving the current mirror that balances the current between the input and the output stages of the amplifier. Prototypes of the circuit were fabricated in 0.6 μm CMOS using MPW (multi-project wafer) services and were fully characterized.
Keywords :
CMOS analogue integrated circuits; circuit CAD; circuit simulation; current mirrors; instrumentation amplifiers; integrated circuit design; integrated circuit measurement; integrated circuit modelling; 0.6 micron; 100 kHz; CMOS integrated instrumentation amplifiers; amplifier CMRR improvement; common-mode rejection ratio; current-balancing techniques; high common-mode signal immunity; input/output stage balancing current mirror; CMOS integrated circuits; Instruments;
Conference_Titel :
Integrated Circuits and Systems Design, 2002. Proceedings. 15th Symposium on
Print_ISBN :
0-7695-1807-9
DOI :
10.1109/SBCCI.2002.1137637
