DocumentCode :
2717908
Title :
High PSRR CMOS voltage reference for negative LDOS
Author :
Stanescu, Cornel ; Caracas, Cristi ; Panaite, Dragos ; Aungurencei, Gabriel ; Russell, Anthony ; Georgescu, Sorin
Author_Institution :
Catalyst Semicond. Romania, Bucharest, Romania
Volume :
2
fYear :
2004
fDate :
4-6 Oct. 2004
Firstpage :
311
Abstract :
This work presents a CMOS voltage reference built within a negative LDO processed in a double-metal 0.8 μm CMOS technology. The reference consumes 12 μA, and delivers a stable output voltage of -1.2 V. Power supply rejection ratio is 86 dB at low frequencies, while TC is within ±50 ppm/°C, and un-trimmed VREF spread 60 mV (±3σ).
Keywords :
CMOS integrated circuits; integrated circuit modelling; power supply circuits; reference circuits; -1.2 V; 0.8 micron; 12 muA; 60 mV; CMOS voltage reference; double metal CMOS technology; negative low dropout; power supply rejection ratio; stable output voltage; temperature coefficient; voltage reference; Bipolar transistor circuits; CMOS technology; Capacitors; Circuit simulation; Frequency; Rails; Resistors; SPICE; Threshold voltage; USA Councils;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Conference, 2004. CAS 2004 Proceedings. 2004 International
Print_ISBN :
0-7803-8499-7
Type :
conf
DOI :
10.1109/SMICND.2004.1403002
Filename :
1403002
Link To Document :
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