Power management exploration for a block turbo decoder

A design model may be used from functional validation to design implementation. In this paper, a C model that has already been used to validate and estimate functional performance is used to explore data transfer and storage, aiming to reduce power consumption. Through this model, a systematic methodology for power management (DTSE) is applied to a block turbo-decoding algorithm. Estimations of power dissipation are conducted using a tool for counting memory accesses in an executable C code. Results show a decrease of 25% in power dissipation.