Low-power control architecture for embedded processors

Author

Mattos, Julio C B ; Kreutz, Márcio ; Carro, Luigi

Author_Institution

Comput. Sci. Inst., UFRGS, Brazil

fYear

2002

fDate

2002

Firstpage

221

Lastpage

226

Abstract

This paper presents a low-power design strategy to implement the control architecture of embedded processors. Instead of using power demanding memories to store instruction words, we exploit the way instructions are coded, and substitute for the memory array with a specialized reconfigurable combinational circuit, with lower power requirements. The paper also presents the implementation of the technique in an FPGA-based microcontroller.

Keywords

combinational circuits; embedded systems; field programmable gate arrays; integrated circuit design; logic design; low-power electronics; microcontrollers; microprocessor chips; reconfigurable architectures; FPGA-based microcontroller; control architecture; embedded processors; instruction coding; instruction word storage; low-power control architecture; low-power design strategy; memory array; memory power demand; power requirements; reconfigurable combinational circuit; Application software; Combinational circuits; Computer architecture; Computer science; Embedded software; Embedded system; Field programmable gate arrays; Hardware; Java; Microcontrollers;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits and Systems Design, 2002. Proceedings. 15th Symposium on

Print_ISBN

0-7695-1807-9

Type

conf

DOI

10.1109/SBCCI.2002.1137662

Filename

1137662