DocumentCode :
2718313
Title :
Coding and decoding of clock synchronization in digital multiplexing system
Author :
Hansheng, Wang ; Xiaoyi, Qin ; Lieguang, Zeng
Author_Institution :
Tsinghua Univ., Beijing, China
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
1028
Abstract :
Digital multiplexing is the basis of high-speed broadband digital communication networks, whose theory kernel is the processing and transmitting of clock synchronization. The transmission of clock synchronization was not understood systematically and thoroughly before, and it was limited to analyzing only the jitter of justification. This paper interprets the process of clock synchronization in a multiplexing system from quantizing and coding the information of clock synchronization (interprets justification from TΔ-ΣM), and interprets the jitter of justification from quantization error. According to the theoretical model, decreasing the jitter caused by justification is decreasing the quantization error, because the jitter is caused by the quantization error of the information of clock synchronization
Keywords :
broadband networks; decoding; digital communication; encoding; jitter; multiplexing; quantisation (signal); synchronisation; clock synchronization coding; clock synchronization decoding; digital multiplexing system; high-speed broadband digital communication networks; justification jitter; quantization error; theory kernel; Clocks; Decoding; Demultiplexing; Digital communication; Frequency; Jitter; Quantization; Signal processing; Synchronization; Synchronous digital hierarchy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication Technology Proceedings, 2000. WCC - ICCT 2000. International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-6394-9
Type :
conf
DOI :
10.1109/ICCT.2000.890851
Filename :
890851
Link To Document :
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