Integrated designs and applications of the SDH system chip MXLO21E1-3

Author

Xiaoyi, Qin ; Depeng, Jin ; Hansheng, Wang ; Yanping, Sha ; Lieguang, Zeng

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing, China

Volume

2

fYear

2000

fDate

2000

Firstpage

1046

Abstract

In order to adapt the fast evolution of SDH, the SDH ADM/TM integrated chip MXLO21E1-3 which can maximally implement 21 E1 signals´ flexible add/drop to/from VC-4 buses has been developed. This paper describes the main features, function modules and the novel digital desynchronization method of this chip. Performance measurement results and some applications are also shown. From the descriptions we can see that jitter and wander performances of the MXLO21E1-3 satisfy the ITU-T recommendation well, and the overheads, alarms and performance monitors are abundant. The MXLO21E1-3 has large-scale, powerful functions and few peripheral circuits, and can bring convenience, simplification and agility for many SDH equipment application environments

Keywords

application specific integrated circuits; jitter; multiplexing equipment; synchronisation; synchronous digital hierarchy; ADM/TM integrated chip; ITU-T recommendation; MXLO21E1-3; SDH equipment; SDH system chip; VC-4 buses; digital desynchronization; flexible add/drop multiplexing; jitter; performance measurement; wander; Application specific integrated circuits; Clocks; Integrated circuit measurements; Jitter; Large-scale systems; Multiplexing; Performance evaluation; Semiconductor device measurement; Switches; Synchronous digital hierarchy;

fLanguage

English

Publisher

ieee

Conference_Titel

Communication Technology Proceedings, 2000. WCC - ICCT 2000. International Conference on

Conference_Location

Beijing

Print_ISBN

0-7803-6394-9

Type

conf

DOI

10.1109/ICCT.2000.890855

Filename

890855