• DocumentCode
    2719089
  • Title

    Analyzing the individual/combined effects of speculative and guarded execution on a superscalar architecture

  • Author

    Srinivas, M. ; Nicolau, Alexandru

  • Author_Institution
    Silicon Graphics Inc., Mountain View, CA, USA
  • fYear
    1998
  • fDate
    30 Mar-3 Apr 1998
  • Firstpage
    199
  • Lastpage
    208
  • Abstract
    Speculative execution is a technique by which instructions are executed before the condition that controls it is evaluated. This can increase the performance if some of the idle CPU cycles are now used to execute speculated instructions. Guarded execution is a technique in which the branch instruction is eliminated and control dependencies are converted to data dependencies. This can help reduce some of the side-effects involved with branch instructions besides creating larger compilation units. However, excessive application of either one of them can result in dismal performance. Conventional approaches have used a one-time feedback metric and made all decisions based on it. We present a new way of designing feedback metrics and show how it can be used to regulate the effects of dynamic speculation and the side-effects of applying guarded execution statically. The proposed method presents 0.3 to 0.6-fold improvements over a conventional scheme using SPEC benchmarks
  • Keywords
    feedback; parallel architectures; parallel programming; performance evaluation; SPEC benchmarks; branch instruction; compilation units; control condition evaluation; control dependencies; data dependencies; dynamic speculation; feedback metrics design; guarded execution; idle CPU cycles; instruction execution; performance; speculated instructions; speculative execution; superscalar architecture; Computer science; Feedback; Graphics; Hardware; Parallel processing; Pipeline processing; Processor scheduling; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Symposium, 1998. IPPS/SPDP 1998. Proceedings of the First Merged International ... and Symposium on Parallel and Distributed Processing 1998
  • Conference_Location
    Orlando, FL
  • ISSN
    1063-7133
  • Print_ISBN
    0-8186-8404-6
  • Type

    conf

  • DOI
    10.1109/IPPS.1998.669911
  • Filename
    669911