DocumentCode
2719773
Title
Efficient worst case analysis of integrated circuits
Author
Lokanathan, A.N. ; Brockman, Jay B.
Author_Institution
Dept. of Comput. Sci. & Eng., Notre Dame Univ., IN, USA
fYear
1995
fDate
1-4 May 1995
Firstpage
237
Lastpage
240
Abstract
A simple, accurate and inexpensive approach to worst case analysis of integrated circuits is presented. The approach may be applied to either known process statistics or a database of candidate simulation points
Keywords
circuit CAD; circuit analysis computing; digital simulation; integrated circuit design; monolithic integrated circuits; semiconductor process modelling; IC design; candidate simulation point database; circuit CAD; known process statistics; semiconductor integrated circuits; worst case analysis; Analytical models; Circuit analysis; Circuit optimization; Circuit simulation; Computer aided software engineering; Computer science; Costs; Databases; Fabrication; Performance analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location
Santa Clara, CA
Print_ISBN
0-7803-2584-2
Type
conf
DOI
10.1109/CICC.1995.518176
Filename
518176
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