Title :
On-chip cross talk-the new signal integrity challenge
Author_Institution :
Motorola Inc., Austin, TX, USA
Abstract :
Deep submicron digital CMOS circuits are exposed to a new signal integrity challenge, the on-chip crosstalk. Omitting the effects of crosstalk can lead to functional failure of these devices. Due to CMOS chip complexities manual analysis and interconnect changes are impractical and an automated tool is required. The paper describes a practical CAD solution to the problem after giving a detailed discussion of modeling the on-chip crosstalk
Keywords :
CMOS digital integrated circuits; VLSI; circuit CAD; crosstalk; integrated circuit design; integrated circuit modelling; CAD solution; automated tool; chip complexities; deep submicron ICs; digital CMOS circuits; on-chip crosstalk; signal integrity; CMOS digital integrated circuits; CMOS integrated circuits; CMOS technology; Circuit noise; Coupling circuits; Integrated circuit interconnections; Integrated circuit modeling; Printed circuits; Voltage; Wires;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518179
