Title :
A chip set for a digital audio broadcasting channel decoder
Author :
Delaruelle, A. ; Huisken, J. ; Van Loon, J. ; Welten, F.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
In this paper the design of two chips for an ASIC based channel decoder for a Digital Audio Broadcasting (DAB) system is discussed. The ASIC solution is a follow-up to an expensive implementation which is based on general purpose DSP processors. Both ASICs are used in a test receiver and a precursor consumer DAB receiver
Keywords :
application specific integrated circuits; decoding; digital audio broadcasting; integrated circuit design; radio receivers; ASIC; channel decoder; consumer DAB receiver; digital audio broadcasting; test receiver; Application specific integrated circuits; Computer architecture; Decoding; Digital audio broadcasting; Digital signal processing; Digital signal processing chips; Frequency synchronization; Random access memory; Testing; Viterbi algorithm;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518189
