Title :
Design of packet-fair queuing schedulers in router
Author :
Haijun, Yang ; Peilin, Hong ; Jinsheng, Li
Author_Institution :
Inf. Network Lab., USTC, Hefei, China
Abstract :
Implementing a packet scheduling mechanism in next generation routers has become a central issue for providing networking-level QoS guarantees to a large number of sessions. In this paper, we present an effective improved design of a packet-fair queuing scheduler based on discrete backlogged rates and packet lengths. We also provide a new technology for timestamp reconstruction which can effectively decrease the necessary storage space of timestamps without introducing any ambiguity in comparison operations
Keywords :
packet switching; quality of service; queueing theory; scheduling; telecommunication network routing; discrete backlogged rates; networking-level QoS guarantees; next generation routers; packet lengths; packet scheduling mechanism; packet-fair queuing schedulers; timestamp reconstruction; Flexible structures; Global Positioning System; Intelligent networks; Intserv networks; Laboratories; Next generation networking; Scheduling algorithm; Space technology; Telecommunication traffic; Traffic control;
Conference_Titel :
Communication Technology Proceedings, 2000. WCC - ICCT 2000. International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-6394-9
DOI :
10.1109/ICCT.2000.890976
