DocumentCode
2720439
Title
Testability conditions for linear sequential arrays
Author
Buonanno, Giacomo ; Lombardi, Fabrizio ; Sciuto, Donatella
Author_Institution
Dipartimento di Elettronica, Politecnico di Milano, Italy
fYear
1991
fDate
27-30 Mar 1991
Firstpage
63
Lastpage
70
Abstract
The problem of testing one-dimensional arrays made of sequential cells is addressed. Each cell is modeled as a finite state machine. Test sequence generation is accomplished using the unique input-output sequence method. The single cell fault model is adopted together with a functional model consisting of transition faults. Fault coverage is evaluated with respect to a gate level implementation of the cell. The conditions for controllability, observability and constant testability are defined. The added difficulty for such a testable approach stems from the fact that tests for sequential cells are composed of sequences of inputs instead of a single input combination (as for the combinational case). Guidelines for choosing test sequences which guarantee testability (and whenever possible, constant testability) without modification to the basic cell are introduced
Keywords
controllability; fault location; logic arrays; logic testing; observability; sequential circuits; controllability; finite state machine; functional model; input-output sequence method; linear sequential arrays; observability; one-dimensional arrays; sequential cells; single cell fault model; test sequence generation; testability conditions; transition faults; Automata; Computer industry; Computer science; Controllability; Discrete Fourier transforms; Guidelines; Observability; Sequential analysis; Testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers and Communications, 1991. Conference Proceedings., Tenth Annual International Phoenix Conference on
Conference_Location
Scottsdale, AZ
Print_ISBN
0-8186-2133-8
Type
conf
DOI
10.1109/PCCC.1991.113793
Filename
113793
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