APRICOT: A framework for teaching digital systems verification

The paper presents a new framework for digital systems verification. The framework has been developed in Tallinn University of Technology and it is called APRICOT. It supports a wide range of verification tasks including assertion checking, code coverage analysis, simulation, test generation and property checking and it is also easy to set up and use. Therefore it is highly suitable for supporting higher education and research in verification. The novelty of APRICOT lies in a system representation model called High-Level Decision Diagrams (HLDD). APRICOT has also interfaces to commonly used design formats such as VHDL, SystemC, PSL and EDIF.