Title :
A module generator for high speed CMOS current output digital/analog converters
Author :
Neff, Robert R. ; Gray, Paul R. ; Sangiovanni-Vincentelli, Alberto
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
This paper presents a module generator for Digital/Analog Converter (DAC) circuits. A combination of circuit simulation and DAC design equations is used to estimate performance. A new constrained optimization method is used to determine design variable values. The layout is created using stretching and tiling operations on a set of primitive cells. Close coupling of optimization and layout allows accurate incorporation of layout parasitics in optimization. Prototypes have been demonstrated for an 8-bit, 100-MHz specification, driving a 37.5-ohm video load, and a static 10-bit specification, driving a 4 mA full-scale output current. Both designs use a 5-V supply in a standard 1.2 μm CMOS process
Keywords :
CMOS integrated circuits; circuit analysis computing; circuit layout CAD; circuit optimisation; digital-analogue conversion; integrated circuit layout; 1.2 micron; 10 bit; 100 MHz; 4 mA; 5 V; 8 bit; CMOS; DAC design equations; circuit simulation; constrained optimization method; current output digital/analog converters; design variable values; full-scale output current; layout parasitics; module generator; primitive cells; stretching operations; tiling operations; Analog computers; Analog-digital conversion; CMOS process; CMOS technology; Circuit simulation; Design optimization; Equations; Mixed analog digital integrated circuits; Optimization methods; Prototypes;
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
DOI :
10.1109/CICC.1995.518229
