Efficient barrier synchronization mechanism for the BSP model on message-passing architectures

The Bulk Synchronous Parallel (BSP) model of computation can be used to develop efficient and portable programs for a range of machines and applications. However the cost of the barrier synchronization used in the BSP model is relatively expensive for message-passing architectures. In this paper we relax the barrier synchronization constraint in the BSP model for the efficient implementation on message-passing architectures. In our relaxed barrier synchronization, the synchronization occurs at the time of accessing non-local data only between the producer and the consumer processors, eliminating the exchange of global information. From the experimental evaluations on IBM SP2, we have observed that the relaxed barrier synchronization reduces the total synchronization time by 45.2% to 61.5% in FT, and 28.6% to 49.0% in LU with 32 processors