DocumentCode :
2721171
Title :
Enhancing the boundary scan standard to test resistively-terminated printed circuit board interconnects
Author :
Miles, J.R. ; Swain, S.R.
Author_Institution :
Dept. of Eng., Reading Univ., UK
fYear :
1995
fDate :
1-4 May 1995
Firstpage :
647
Lastpage :
650
Abstract :
The performance of many digital systems requires that the interconnections on a printed board assembly (PEA) are considered as a transmission line. The authors present details of a method of using the boundary scan test technique to test for the presence or absence of the terminating resistors required, in addition to a conventional interconnect test, during manufacturing. Details of the test sequences and general purpose detector circuits which have been designed and fabricated in CMOS technology are presented
Keywords :
CMOS digital integrated circuits; boundary scan testing; integrated circuit interconnections; integrated circuit testing; printed circuit testing; production testing; CMOS technology; VLSI components; boundary scan standard; detector circuits; digital systems; printed circuit board interconnects; resistively-terminated PCB interconnects; test sequences; Assembly systems; CMOS technology; Circuit testing; Digital systems; Impedance; Integrated circuit interconnections; Manufacturing; Printed circuits; Resistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-2584-2
Type :
conf
DOI :
10.1109/CICC.1995.518264
Filename :
518264
Link To Document :
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