DocumentCode
2721968
Title
Future Memory Devices - from Stacked memory, Gain memory, Single-electron memory to Molecular memory
Author
Nakazato, Kazuo
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Nagoya Univ.
fYear
2006
fDate
24-26 April 2006
Firstpage
1
Lastpage
2
Abstract
Future possibilities for high speed memories will be discussed. In stacked memories, vertical MOSFETs are stacked onto MOSFETs. A 500 MHz 64 Mbit SRAM was demonstrated with reduced cell area, 60% of planar cell. PLEDM was proposed as a scalable DRAM gain cell which leads to single-electron memories. The transfer and detection of one electron was demonstrated using SOI structures at 4.2K. To achieve the room-temperature operations, nodes must be formed in atomic scale, and molecular memories should be investigated
Keywords
DRAM chips; MOS memory circuits; SRAM chips; 4.2 K; 500 MHz; 64 Mbit; DRAM; PLEDM; SOI structures; SRAM; gain memory; high speed memories; memory devices; molecular memory; single-electron memory; stacked memory; vertical MOSFET; Grain boundaries; Heterojunctions; MOSFETs; Random access memory; Semiconductor diodes; Silicon; Single electron memory; Thermionic emission; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 2006 International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
1-4244-0181-4
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2006.251114
Filename
4016587
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