Combined simulator statistics and block code sampling to study performance enhancement of microarchitecture

This paper presents a simple approach combining the statistics of simulation and block code sampling to study the performance enhancement of the microarchitecture with duplicated pipelines (enhanced microarchitectures). We collect the statistics from the simulation of EEMBC benchmark code on a TriCore™ 2.0 implementation and use them to sample blocks of code and simulate different enhanced microarchitectures. The new simulation results are used to analyse the performance benefits of each microarchitecture enhancement, which can narrow down the design space exploration.