Title :
Reliability-aware floorplanning for 3D circuits
Author :
Minz, Jacob ; Wong, Eric ; Lim, Sung Kyu
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
In this work, we propose a 3D module and de-cap (decoupling capacitance) placement algorithm that evenly distributes the thermal profile and reduces the power supply noise. We provide efficient algorithms for 3D thermal and power supply noise analysis to guide our 3D module placement process. In addition, we allocate white spaces around the modules that require decaps to suppress the power supply noise while minimizing the area overhead.
Keywords :
integrated circuit layout; integrated circuit noise; integrated circuit reliability; thermal noise; 3D circuits; 3D module placement process; 3D thermal noise analysis; de-cap placement algorithm; decoupling capacitance placement algorithm; power supply noise analysis; reliability-aware floorplanning; thermal profile; Annealing; Costs; Distributed computing; Integrated circuit noise; Noise reduction; Power supplies; Temperature; Thermal conductivity; Thermal resistance; White spaces;
Conference_Titel :
SOC Conference, 2005. Proceedings. IEEE International
Print_ISBN :
0-7803-9264-7
DOI :
10.1109/SOCC.2005.1554461
