DocumentCode
2722423
Title
Advanced Substrate Engineering for the Nanotechnology Era
Author
Mazure, Carlos
Author_Institution
SOITEC Pare technologique des Fontaines, Crolles
fYear
2006
fDate
24-26 April 2006
Firstpage
1
Lastpage
2
Abstract
Engineered substrates is one of the most important innovations of the nanotechnology era driven by the vanishing boundary between substrate design and device architecture. SOI substrates, the first engineered substrates of its kind, have made possible an efficient optimization of MOSFET current drive while minimizing the leakage and reducing parasitic elements, thus enhancing the overall IC performance. Mobility enhancing substrates have added new handles to traditional scaling further improving device and IC performance. An overview of the advances in Smart Cut engineered substrates and the impact on device performance is given
Keywords
MOS integrated circuits; carrier mobility; nanotechnology; silicon-on-insulator; substrates; IC performance; MOSFET current; SOI substrates; Smart Cut; advanced substrate engineering; device architecture; engineered substrates; mobility enhancing substrates; nanotechnology era; substrate design; CMOS technology; Conductivity; Design engineering; Dielectric materials; Dielectric substrates; Impedance; Isolation technology; Nanotechnology; Power engineering and energy; Production;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems, and Applications, 2006 International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
1-4244-0181-4
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2006.251074
Filename
4016610
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