DocumentCode :
2722489
Title :
Implementation and evaluation of FAST corner detection on the massively parallel embedded processor MX-G
Author :
Moko, Yushi ; Watanabe, Yoshihiro ; Komuro, Takashi ; Ishikawa, Masatoshi ; Nakajima, Masami ; Arim, Kazutami
Author_Institution :
Univ. of Tokyo, Tokyo, Japan
fYear :
2011
fDate :
20-25 June 2011
Firstpage :
157
Lastpage :
162
Abstract :
We implemented and evaluated the FAST corner detection algorithm on the MX-G, a system LSI device with a matrix-type massively parallel processor ”MX core” developed by Renesas Electronics Corp. FAST corner detection is a very efficient feature detection algorithm. We developed a method to parallelize the FAST algorithm by using both the MX core and the SH-2A host CPU effectively. Our implementation achieved about five times faster performance than an implementation using only the host CPU. Experimental results show that the parallel FAST algorithm can detect corners from 512×512 monochrome images at video rates on an embedded processor.
Keywords :
edge detection; embedded systems; feature extraction; microprocessor chips; parallel processing; FAST corner detection algorithm; LSI device; MX core; SH-2A host CPU; feature detection algorithm; matrix-type massively parallel processor; monochrome images; parallel embedded processor MX-G; Feature extraction; Large scale integration; Performance evaluation; Registers; SDRAM; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Vision and Pattern Recognition Workshops (CVPRW), 2011 IEEE Computer Society Conference on
Conference_Location :
Colorado Springs, CO
ISSN :
2160-7508
Print_ISBN :
978-1-4577-0529-8
Type :
conf
DOI :
10.1109/CVPRW.2011.5981839
Filename :
5981839
Link To Document :
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