Overview and Future Challenge of Floating Body Cell (FBC) Technology for Embedded Applications

Author

Nitayama, Akihiro ; Ohsawa, Takashi ; Hamamoto, Takeshi

Author_Institution

SoC R&D Center, Toshiba Corp., Yokohama

fYear

2006

fDate

24-26 April 2006

Firstpage

1

Lastpage

3

Abstract

A one-transistor memory cell on silicon-on-insulator, called floating body cell (FBC), has been developed for high density embedded DRAM applications. The functionality of a 128Mb FBC DRAM using fully compatible 90nm CMOS technology has been successfully demonstrated. The memory cell design, such as fully-depleted (FD) operation with substrate-bias, and the process integration, such as well and Cu wiring, are reviewed. The scalability and future challenge of FBC technology are discussed as well

Keywords

CMOS memory circuits; DRAM chips; integrated circuit design; silicon-on-insulator; 128 Mbit; 90 nm; CMOS technology; Cu; DRAM cell; floating body cell; fully-depleted operation; memory cell design; one-transistor memory cell; process integration; silicon-on-insulator; CMOS process; CMOS technology; Circuits; Fabrication; Immune system; Random access memory; Scalability; Silicon on insulator technology; Threshold voltage; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 2006 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

1-4244-0181-4

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2006.251082

Filename

4016618