DocumentCode
2722532
Title
Support for multiprocessor synchronization and resource sharing in system-on-programmable chips with softcores
Author
Gai, Paolo ; Lipari, Giuseppe ; Natale, Marco Di ; Duranti, Matteo ; Ferrari, Alberto
Author_Institution
Evidence Srl, Pisa, Italy
fYear
2005
fDate
25-28 Sept. 2005
Firstpage
109
Lastpage
110
Abstract
In this paper we present an arbitrator implementation for enabling multiprocessor synchronization and resource sharing primitives with guaranteed maximum latency in real-time operating systems (RTOS). The arbitrator has been developed for use in conjunction with the NIOS II softcore in the Altera family of system on programmable chips.
Keywords
field programmable gate arrays; multiprocessing systems; operating systems (computers); programmable circuits; real-time systems; synchronisation; system-on-chip; NIOS II softcore; multiprocessor synchronization; real-time operating systems; resource sharing; system-on-programmable chips; Costs; Delay; Embedded computing; Embedded system; Field programmable gate arrays; Hardware; Operating systems; Real time systems; Resource management; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference, 2005. Proceedings. IEEE International
Print_ISBN
0-7803-9264-7
Type
conf
DOI
10.1109/SOCC.2005.1554472
Filename
1554472
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